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Welcome to SpiNNaker2

If you are here, we are sure that you know what SpiNNaker2 is. However, in case you arrived while searching for sailing boats, SpiNNaker2 is a microchip housing 153 ARM cores with 19MB on-chip SRAM, 2GB DRAM, and dedicated Machine Learning and Neuromorphic accelerators. Manufactured in 22nm FDSOI, it employs Adaptive Body Biasing (ABB) in a Forward Body Bias (FBB) configuration, as well as DVFS for adaptive near-threshold operation, enabling performance improvements over its predecessor and a new pool of capabilities.

SpiNNaker2 Chip Copyrighted SpiNNaker2 image to SpiNNcloud Systems GmbH

Using SpiNNaker2

  • Access to SpiNNaker2 Hardware: For academical access please send an e-mail to Bernhard Vogginger, and for commercial access please contact Hector Gonzalez.
  • User support: There is a Matrix Chat for users of the SpiNNaker2 chip server at TU Dresden. Please send your matrix account (e.g., max.mayor:matrix.org) to Bernhard Vogginger.
  • Missing or wrong documentation: If you need a documentation of a specific feature or found an error in existing documentation, please create an issue here.

Acknowledgement

The efforts made to build this detailed documentation for SpiNNaker2 have been funded by the European Innovation Council (EIC) Transition program under the SpiNNode project (grant number 101112987).